Optimization of Nanoelectronic Systems Reliability by Reducing Logic Depth

In this paper we address the possibility to improve the reliability of small to middle-size circuits without employing redundancy. Circuits’ reliability is improved by reducing the logic depth of critical paths since the probability of failure of each output of the circuit depends no the logic depth of critical paths. Circuits of the same size were considered, as well as different synthesized versions of the same circuit and the estimation of the probability of failure is given with respect to the logic depth.